Abstract
This work investigates, for the first time to our best knowledge, non-linearities in Fully-depleted Silicon-on-Insulator (FDSOI) MOSFETs and compares them with bulk counterparts. 1st, 2nd and 3rd order derivatives of current-voltage I–V characteristics, followed by Harmonic Distortions of 2nd and 3rd order (HD 2 and HD 3 ) were extracted based on DC measurements and simulations. Design window (i.e. bias and current conditions) with strongly reduced non-linearity in FDSOI device with respect to the bulk counterpart was identified and reasons of this reduction are discussed. Application of the back-gate bias in FDSOI MOSFET was shown to allow for further improvement of non-linearity.
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