Abstract
A Multi-stage Interconnection Network (MIN) is one of the choices for Networks-on-Chip (NoCs) architecture designer for its simple topology and easy scalability with low degree. The evolution of digital design lies in the ability to shrink circuit size with each advance in process technology. As CMOS implementing technology continues to scale down, standard interconnect will become a major bottleneck for on-chip MIN platform performance. One of the nanoelectronic architectures that have been reorganized as one of the top six emerging technologies in future computers, known as Carbon NanoTube (CNT). CNTs have emerged as a promising material for future generation ICs. It is our purpose, in this paper, to present a comparative performance study for implementation of six prominent MINs (i.e., Omega, Butterfly, Baseline, Generalized Cube, Benes, and Clos networks) using CNT-based switches. The performance measures studied are compared to that of conventional CMOS in 16nm process technology and reflect a great deal of improvement in the network performance.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.