Comparative Investigation on Bias Dependent RF Performance of SOI Substrates

Abstract

In this work, direct current (DC) bias effects on radio frequency (RF) performance of three types of RF silicon-on-insulator (RF-SOI) substrates are comparatively investigated by using coplanar waveguide (CPW) lines. It is demonstrated that the loss and harmonic distortion of CPW line on high resistivity silicon-on-insulator (HR-SOI) substrate are more sensitive to variations of DC bias. This is attributed to the parasitic nonlinear capacitance and conductance in the parasitic surface conduction (PSC) layer. In comparison, the influence of DC bias on the RF performance of trap-rich silicon-on-insulator (TR-SOI) substrate can be negligible due to the trap-rich layer which can get rid of the PSC by trapping free carriers inside the substrate. Bias effects on the RF performance of two types of TR-SOI substrates with different high resistivity substrate are also compared. The results show that the RF characteristics of TR-SOI #2 (TR2) is more independent with respect to the applied bias than that of TR-SOI #1 (TR1). This stems from the smaller parasitic effects and increased effective resistivity.