Abstract
This paper describes a method for implementing a digital Infinite Impulse Response (IIR) filters using different registered adders and shift method to improve occupied area and delay. Canonical Signed Digit (CSD) representation for defined filter coefficients has been extensively used to reduce the number of adders. The method using different adders is effectively applied to a four-order IIR filter. The performance of IIR filter using parallel prefix adders is compared with the filter using Ripple Carry Adder. Number of additions has been reduced to 33% by using CSD representation as compared to Binary representation. The proposed IIR filters are synthesized and implemented using Xilinx ISE Simulator. The designs perform significantly better than conventional IIR filters.
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