Abstract
The importance of DSP systems with low power, low area and high performance appear to be increasing with no visible sign of saturation. Digital filters play a vital role in digital systems where Finite Impulse Response (FIR) filters are one of the most widely used fundamental devices. This review paper deal with the design and implementation of parallel FIR filter structure on FPGA using 4 different parallel processing methodologies with minimal cost of hardware. Since adders have no effect to the filter length and occupy less area than the multipliers, here multipliers are exchanged with adders. The paper hence describes the comparative performance analysis of traditional parallel FIR filter with respect to the FFA, transposition and symmetric convolution based parallel FIR filter with featuring the advantage of reduced hardware complexity to accurate processing with conservation of filter dynamic.
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