Compact thermal models of packages used in conduction cooled applications

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Results of an extensive study aimed at developing boundary condition independent compact steady-state thermal models of a variety of electronic packages used in conduction cooled applications are presented. Formal mathematical principles were used to establish a nonredundant set of thermal boundary conditions representing board edge and backside cooling with variable board and underfill conductivity. A Design of Experiments approach was employed to reduce the total number of boundary conditions to four, allowing the generation of boundary condition independent CTM's. Two general network topologies, incorporating both simple star-shaped and more complex, shunted networks were developed. To extract the CTM parameters, the thermal networks were optimized using a genetic algorithm-based approach allowing constrained nonlinear global optimization in a standard spreadsheet environment. Comparisons of the accuracy of models from simple to complex are presented for two types of generic parts. It was found that optimized star-shaped CTM's accurately predict junction temperatures, but usually give insufficient accuracy for the heat flows leaving via the package prime lumped surfaces. The inclusion of a floating node allows sufficient degree of freedom to correctly redistribute the heat flows between the "outlet" nodes of the networks. Using the optimization technique, CTM's were derived for thirty parts representing thirteen package families. For most of the packages only network topologies that included a floating node and surface-to-surface links provided satisfactory accuracy. With three different network configurations, for which examples are presented, it was possible to capture the thermal behavior of all the package families investigated.