Compact Superconducting Lookup Table Composed of Two-Dimensional Memory Cell Array Reconfigured by External DC Control Currents

Takuya Hosoya,Yuki Yamanashi,Nobuyuki Yoshikawa

doi:10.1109/tasc.2021.3049771

Takuya Hosoya, Yuki Yamanashi + Show 1 more

Open Access

https://doi.org/10.1109/tasc.2021.3049771

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Abstract

We investigated the hardware implementation of an area-efficient superconducting lookup table (LUT) based on a single flux quantum (SFQ) logic by using a newly proposed small memory cell. The memory cell is composed of a nondestructive read-out (NDRO) flip-flop with input circuits that convert the input dc current to an SFQ pulse signal. The datum can be written to the selected memory cell in the 2-D memory cell array by applying both <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</i> - and <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">y</i> -directional dc control currents. The data stored in the memory cell array can be reset simultaneously by applying a dc current to a common reset line. By employing the new memory cell, wiring for reconfiguring the data and resetting the memory cell array can be drastically simplified compared to that of the conventional SFQ LUT. We implemented and tested the memory cell and confirmed the correct operation with wide dc bias and input-current margins. We designed the 16-b LUT using the designed memory cells. The circuit area and the number of Josephson junctions of the 16-b LUT is reduced by approximately 24 and 41%, respectively, compared to those of the LUT based on the conventional architecture. We experimentally obtained the correct operation and reconfiguration of the 4-b LUT that uses the new memory cells with a normalized bias margin of –22 to +7%.

Highlights

J OSEPHSON junction [1] (JJ) based superconducting circuits [2], [3] are attracting attention as an alternative technology to semiconductor integrated circuits because of its high-speed operation and superior energy efficiency [4], [5]
This memory cell is composed of a simplified nondestructive read-out (NDRO) flip-flop with magnetically coupled dc/single flux quantum (SFQ) converters (MC-dc/SFQs) [24], [25] that convert the dc current input to the HOSOYA et al.: COMPACT SUPERCONDUCTING lookup table (LUT) COMPOSED OF 2-D MEMORY CELL ARRAY
We investigated the compact and scalable SFQ LUT based on the new memory cell, the datum of which is written by applying dc control currents

Summary

INTRODUCTION

J OSEPHSON junction [1] (JJ) based superconducting circuits [2], [3] are attracting attention as an alternative technology to semiconductor integrated circuits because of its high-speed operation and superior energy efficiency [4], [5]. Because the typical cell size of the SFQ memory is several tens μ m square [16]–[20], the memory cell array occupies a large portion of the LUT circuit area. The other reason is that a complicated and dense wiring is needed to reconfigure the internal states of the memory cell array in the LUT for inputting SFQ signals to the memory cell. We investigate an SFQ LUT architecture by employing a new compact memory cell, the internal state of which can be reconfigured and reset by applying dc control currents from the room-temperature instruments. In addition to the use of the compact memory cells, because the internal control wiring by JTL and PTL can be removed, the circuit area for LUT implementation can be significantly reduced.

COMPACT SFQ LUT ARCHITECTURE

CIRCUIT IMPLEMENTATION AND EXPERIMENT

Findings

DISCUSSION

CONCLUSION