Abstract
A compact model applicable for both Schottky barrier diode (SBD) and junction barrier Schottky diode (JBS) structures is developed. The SBD model considers the current due to thermionic emission in the metal/semiconductor junction together with the resistance of the lightly doped drift layer. Extension of the SBD model to JBS is accomplished by modeling the distributed resistance induced by the p+ implant developed for minimizing the leakage current at reverse bias. Only the geometrical features of the p+ implant are necessary to model the distributed resistance. Reproduction of 4H-SiC SBD and JBS current–voltage characteristics with the developed compact model are validated against two-dimensional (2D) device-simulation results as well as measurements at different temperatures.
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