Abstract
High temperatures and other harsh environments are domains of predilection for Junction FETs, particularly when wide band-gap semiconductors such as SiC or GaN are used. The present work describes the new compact model of double gate (DG) JFETs which is compared to TCAD simulations of SiC and GaN JFETs over a wide temperature range up to 500oC. The compact model is shown to be predictive of device behavior, for static (current-voltage) as well as dynamic (capacitance-voltage) behavior of long-channel DG JFETs.
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