Abstract
The double-gate (DG) junction field-effect transistor (JFET) is a classical electron device, with a simple structure that presents many advantages in terms of device fabrication but also its principle of operation. The device has been largely used in low-noise applications, but also more recently, in power electronics. Furthermore, co-integration of JFET with CMOS technology is attractive. Physics-based compact models for JFETs are however scarce. In this paper, an analytical, charge-based model is established for the mobile charges, drain current, transconductances and transcapacitances of symmetric DG JFETs, covering all regions of device operation, continuously from subthreshold to linear and saturation operation. This charge-based JFET model (called CJM) constitutes the basis of a full compact model of the DG JFET for analog, RF, and digital circuit simulation.
Highlights
junction field-effect transistor (JFET) are unipolar devices commonly operating in depletion mode
Ultra-scaled enhancement mode, complementary JFETs using silicon have been proposed for logic applications with channel lengths in the range of 25 nm - 10 nm [6]–[8] with gate voltage lower than 0.5 V to prevent a forward-bias of the channel-to-gate junction
For wide-bandgap semiconductors such as silicon carbide (SiC) [9], [10] or gallium nitride (GaN) [11], the gate voltage can be extended beyond 2V due to their high built-in voltage
Summary
High input impedance and robust breakdown, which render them a preferred choice in a wide range of sensing applications, such as particle detectors [1], bioelectronics [2], microphones, RF circuitry [3], and more. Transconductances, transconductance-to-current ratio, transcapacitances and unity gain frequency (FT ), are shown to be directly related to mobile charge density at source and drain These large- and small-signal quantities are highly important in analog/RF integrated circuit design but will cover needs for digital design using complementary JFETs. The CJM model is coded in Verilog-A [22] to ensure portability among circuit simulators. A normalization scheme is introduced, as used in the context of models for, e.g., singlegate MOSFETs [24] and HEMTs [25] This procedure does not alter the physical relationships, it allows us to write relationships in a more dense way, presenting many advantages, e.g., in terms of analysis, circuit design and parameter extraction (see Section II-C). The charge-potential relation is MAKRIS et al.: CJM: COMPACT MODEL FOR DG JFETs obtained substituting (3) in (2) and reverting it, Vg. where vbi = Vbi/UT is the normalized built-in potential. The first term of the right hand side of (8) is the drift term and the second is the diffusion term
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