Compact low-voltage power-efficient operational amplifier cells for VLSI

Abstract

Compact low-voltage power-efficient operational amplifiers are described that are very suitable as very-large-scale-integration library cells because of the small die area of 0.08 mm/sup 2/ and the minimum supply voltage of 1.8 V. A key part of the circuit is the rail-to-rail class-AB output stage with folded mesh feedback control that combines power efficiency with operation down to 1.8 V and allows sufficient gain in a compact two-stage topology. A version with rail-to-rail input stage features a rail-to-rail input range for supply voltages down to 2.5 V. The dc gain of the op amps is more than 80 db while driving 10 k/spl Omega/, and the unity-gain frequency is 4 MHz with phase margin of 67/spl deg/ while driving 5 pF. The equivalent input noise voltage is 38 nV//spl radic/(Hz) at a frequency of 100 kHz. The amplifiers have been implemented in a standard digital 1.6-/spl mu/m complementary metal-oxide-semiconductor process.