Abstract

The generation of four states in their transfer characteristic of QDG-QDCFET makes them useful to implement four state logic or quaternary logic. On the other hand, the number of device count in a circuit like ADC can also be decreased using this multistate semiconductor device. This work shows the design of a compact analog-to-digital comparator (ADC) where QDG-QDCFET replaces the quantization circuit and reduces the device count. The device-integration increases, which is a major issue for the semiconductor industry. This paper also highlights process variation of the device, different performance parameters and different linearity analysis, such as differential nonlinearity (DNL), integral nonlinearity (INL) of the designed ADC.

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