Abstract
We demonstrate a compact 100 Gbit/s DP-QPSK receiver module that is only 18 mm (W) x 16 mm (D) x 2.8 mm (H). The module size is reduced by using a ball grid array (BGA) package with three-dimensional assembly technology and by applying a heterogeneous integrated PLC. Error-free DP-QPSK signal demodulation is successfully demonstrated.
Highlights
The rapid increase in data traffic has led to an urgent need for a high-capacity photonic network
To increase the signal bit rate in the network, advanced modulation formats are commonly used such as dual-polarization quadrature phase shift keying (DP-QPSK) and quadrature amplitude modulation (QAM) with a digital signal processor (DSP)
We propose a 3-dimensionally integrated 100G DP-QPSK compact receiver module integrated with the one-chip PLC demodulator
Summary
The rapid increase in data traffic has led to an urgent need for a high-capacity photonic network. Several studies have described the downsizing of coherent receivers[1,2,3] such as Si photonics receivers, InP based monolithic receivers, and heterogeneously photo-diodes integrated silicabased PLC receivers Among these lightwave circuit technologies, silica-based PLCs for a coherent demodulator perform relatively well over the C- and L-bands. Two transimpedance amplifiers (TIAs) and eight DC block capacitors each connected to equal-length RF transmission lines are installed in the receiver module This technique enables the receiver module to be greatly reduced without any deterioration in performance. The assembly technique used on the PCB of a conventional receiver module inevitably requires some redundant space This space means that the RF transmission lines connecting between a DSP and the receiver module must be relatively long. This new design enables us to shorten the transmission lines and obtain good signal integrity as shown in Fig. 2 (b)
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