Commutation strategy for reduced output voltage ripple in alternative cascaded boost converter

Abstract

SummaryWith the rapid penetration of low‐voltage direct current (DC) generators such as photovoltaic panels and storage energy systems, the need for processing energy has propitiated the optimization of power electronics converters. Conventional topologies of power electronics converters have well‐known limitations, mainly due to the parasitic elements and finite commutation times, which do not allow for obtaining a sufficient voltage gain. The literature review has demonstrated that cascade topologies are suited to overcome these limitations. However, to provide a low‐ripple output voltage, they require high values of capacitances. This paper presents an alternative boost converter developed by cascading two power cells. The conventional configuration is slightly modified, producing an alternative power cell. Even though the number of elements is increased, following the suggested commutation strategy, the derived converter can substantially reduce the output voltage ripple. Therefore, capacitors of small value can be employed, avoiding using electrolytic capacitors with shorter life spans than their film counterparts. Besides, given the cascaded connection, the converter possesses a quadratic‐type gain since two independent commanding signals are applied. The different states of commutation are analyzed in depth, allowing the selection of an adequate commutation strategy, which gives the advantage of canceling the output voltage ripple. The mathematical model of the converter is presented and then validated via a scale‐lab prototype. The simulation results evidence the good dynamic performance of the control‐loop design by means of the frequency response analysis.