COMMUNICATION CO-PROCESSOR DESIGN BY COMPOSITION OF PARAMETERIZED CELLS

Abstract

We deal with hardware block interconnection in Systems-on-Chip. The cost of writing the glue code grows together with the complexity of such systems. To write such code manually is time consuming. We present a method of communication co-processor generation for multi-processor SoCs. The method is based on composition of the parameterized library cells. The cells are parameterized using external macro language. The parameterization and decomposition of the CC allows decreasing the size of the library, increases code reuse and testability of the components without loss of performance and flexibility. We present a VDSL application as a case study for our approach.