Abstract
ALICE at CERN LHC uses custom FPGA-based computer plug-in cards as interface between the optical detector read-out link and the PC clusters of Data Acquisition (DAQ) and High-Level Trigger (HLT). The cards used at DAQ and HLT during Run1 have been developed as independent projects and are now facing similar problems with obsolete major interfaces and limited link speeds and processing capabilities. A new common card has been developed to enable the upgrade of the read-out chain towards higher link rates while providing backward compatibility with the current architecture. First prototypes could be tested successfully and raised interest from other collaborations.
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