Comments on “New low power and fast SEC-DAEC and SEC-DAEC-TAEC codes for memories in space application”

Abstract

This paper comments on the some mistakes which have been observed in Tripathi et al. (2023) [1]. We have specifically pointed out the following mistakes of Tripathi et al. (2023) [1].i) Presented (41, 32) SEC-DAEC-TAEC H-matrix in Fig. 3 of Tripathi et al. (2023) [1].ii) Presented error detection and correction coverage in Table 6 of Tripathi et al. (2023) [1].The corrected versions of the above mentioned mistakes have been presented in this paper. Also the FPGA-based synthesis result of corrected encoder and decoder circuits based on the corrected (41, 32) H-matrix have been presented here.