Abstract
An original method (COnvergency METhod, COMET) is presented for the deterministic test pattern generation in c-circuits (combinational logic circuits), which issues a completely new theoretic approach to the Automatic Test Pattern Generation (ATPG) problem. It defines a test pattern by a pair of appropriate subgraphs (CONtrollability Graphs, CONGs) from an earlier prepared special graph (Circuit Equivalent Graph, CEG), which maps uniquely a given circuit. This new method overcomes the 5-valued logic of D-algorithm based techniques, [1–5], and is not impeded by the reconvergent fanout present in a circuit. COMET deals with single s-a-0(1) faults in the lines of a circuit. A circuit can include basic logic gates and/or single/multioutput high level modules. COMET is a descriptive method, in the sense that CONGs defining a given fault are explicitly visible on CEG. This makes the method suitable for analytical purposes, in opposition to the already existing methods which do not give the global view, with a single image, of how a test pattern is produced.
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