Abstract

Caches play an important role in embedded systems to bridge the performance gap between fast processor and slow memory. And prefetching mechanisms are proposed to further improve the cache performance. While in real-time systems, the application of caches complicates the Worst-Case Execution Time (WCET) analysis due to its unpredictable behavior. Modern embedded processors often equip locking mechanism to improve timing predictability of the instruction cache. However, locking the whole cache may degrade the cache performance and increase the WCET of the real-time application. In this paper, we proposed an instruction-prefetching combined partial cache locking mechanism, which combines an instruction prefetching mechanism (termed as BBIP) with partial cache locking to improve the WCET estimates of real-time applications. BBIP is an instruction prefetching mechanism we have already proposed to improve the worst-case cache performance and in turn the worst-case execution time. The estimations on typical real-time applications show that the partial cache locking mechanism shows remarkable WCET improvement over static analysis and full cache locking.

Highlights

  • Cache memories are often used in embedded systems to bridge the performance gap between fast processors and slow memory systems by exploiting the temporal and spatial locality of memory accesses in a program

  • We proposed an instruction prefetching mechanism performed at the basic block level to improve the worst-case cache performance

  • The performance is evaluated by comparing its Worst-Case Execution Time (WCET) improvement over the static analysis method used by Li et al in [19] and full cache locking used by Falk et al in [8]

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Summary

Introduction

Cache memories are often used in embedded systems to bridge the performance gap between fast processors and slow memory systems by exploiting the temporal and spatial locality of memory accesses in a program. In hard real-time systems, the cache is problematic due to its unpredictable behavior when calculating the Worst-Case Execution Time (WCET) of a program. WCET is a very important metric when performing the schedulability analysis of a real-time system. It is defined as the upper bound on the execution time on a given hardware platform across all possible inputs. The execution time of each basic block through the worst-case execution path has to be calculated to get the WCET of a program, which in turn depends on determining the time spent on each instruction in the basic blocks. In the presence of caches, the execution time of an instruction may vary due to hit or miss of the access to the instruction cache, which brings in significant imprecision in WCET analysis

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