Combining Current Imaging and Electrical Probing for fast and reliable in situ Electrical Fault Isolation

Abstract

Within the last decades, the feature widths of semiconductor devices have become too small to be resolved by state‐of the art optical microscopes, and other imaging techniques like Scanning Electron Microscopes (SEM) or Scanning Probe Microscopes (SPM) have become indispensable. For some analyses of device failures a combination of imaging and electrical measurements is required. Nowadays, one can find nanoprobers that are either based on SPM or SEM imaging techniques. For the SPM based nanoprobers, each probe consists of an Atomic Force Microscope (AFM) equipped with a conductive tip. For the SEM based systems, nanopositioners without force feedback are placed within a SEM. Both approaches described above have advantages and disadvantages. Landing probes on a desired device is much easier for the SEM prober, as the SEM image gives immediate visual feedback. In contrast, the AFM prober requires many subsequent AFM images by each probe in order to align the probes with respect to each other and with respect to the device, which can be very time consuming. One advantage of the conductive AFM probing is the combination of topography images with electrical transport properties, i.e. images of local resistance (analogue to Scanning Tunneling Microscope (STM)). This allows easy identification of leakages or shorts on the chip. In this work we present a very compact nanoprober that combines the advantages of SEM and SPM nanoprobers in one system. The setup consists of a nanoprober with eight probes and an xyz substage mounted on the stage of an SEM (Zeiss Supra 40). Positioning the probes and the sample with nanometer precision as well as the controls for all electrical measurements are provided by a unified software interface. These can be used to quickly and easily probe contacts on technologies with line widths down to 10 nm and less. The probing experiments can include transistor characterization, electron beam induced current (EBIC) imaging, among others. In order to locate leakages or shorts as described above, a voltage biased probe is scanned at constant height over the sample surface. The resulting current flow to a second probe or to the bulk contact can be simultaneously monitored with sub‐pA resolution. A typical current image can be acquired in a few seconds in a scan range of up to 1.5 µm × 1.5 um. Each probe (or the substage) can be selected as the “scanning” voltage source or the “stationary” current sink, which allows for a very flexible definition of the expected current path enabling a powerful method for the visualization of faults in the integrated circuits. The combination of the SEM image (the probes can be observed while the scan takes place) and the resulting current images enables correlative microscopy. Figure 2 shows an overlay image of the SEM image with current images on a 22 nm chip. Depending on the polarity (+/‐ 1V) of the voltage biased tip, n‐MOS or p‐MOS contacts become visible in the current image.