Abstract
This paper studies the design of low noise amplifier (LNA) by using combining non simultaneous conjugate match and simultaneous conjugate match technique. The purpose of such combining technique is to obtain trade off minimum noise figure, minimum voltage standing wave ratio (VSWR) and high gain. In the design process, two stage configurations are applied. The first stage uses non simultaneous conjugate match (Non SCM) technique and the second one uses simultaneous conjugate match (SCM) technique. This work uses BJT transistors of BFP 840ESD and the rogers RO4003C substrate as planar structure for matching impedances network. The Agilent Design System (ADS) software is used to obtain LNA characteristics. The designed LNA at frequency 9.3 GHz achieves gain 28.01 dB, noise figure 1.57 dB, VSWR input and VSWR output are derived at values 1.17 and 1.28, respectively.
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