Abstract

Abstract The demand for high-performance, high-functionality packages for integrated circuits continues to grow. Three-dimensional (3D) integration is strongly being pursued to meet this demand and has started to reach maturity and industrial adoption. As advanced 3D system designs progress, requiring higher 3D interconnect density with pitches of 10 μm and lower, traditional chip attachment through solder bump technology will likely face complex manufacturing and reliability challenges. Cu-Cu thermocompression bonding has been proposed as a key 3D-enabling technology and alternative to solder. One of the main issues challenging its commercialization in high-volume manufacturing is the sensitivity of Cu-Cu bond quality to prebond surface conditions. This is especially true for die bonding applications which have limited rework options once chips have been singulated. This article outlines further development and demonstration of a tack and collective bonding scheme for Cu-Cu thermocompression bonding. This approach mitigates many of the thermal and throughput issues of a chip-level Cu-Cu attachment process by performing the quick chip alignment at a low temperature and then subsequently completing all Cu bonding simultaneously. The specific use of an intermediate handle wafer between the tack and collective bonding steps allows chips to be reconstructed into a wafer form that facilitates the cleaning and surface preparation of the chips before bonding using standard wafer processing equipment. A chip-to-wafer test structure designed for Cu pillar-to-pad bonding was used as part of this demonstration and illustrates the feasibility of the application. Full transfer of chips to a receiving device wafer using the tack and collective bonding process is shown with electrical test results and selected bond-integrity metrology confirming substantial bond yield and strength.

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