Abstract

Due to the explosive growth of wireless communication, the demands for radio spectrum are rapidly increasing. It is very di±cult to accommodate new wireless services under the current spectrum allocation scheme. On the other hand, the allocated spectrum is not e±ciently utilized. Cognitive Radio is proposed as a technology to solve the imbalance between spectrum scarcity and spectrum under-utilization. Spectrum utilization can be im- proved by making it possible for a user who does not have the license for spectrum (secondary user) to access the spectrum which is not occupied by the licensed user (primary user). This secondary user has the awareness of the spectrum and adapts its transmission accordingly on a non-interference basis. This spectrum access and awareness scheme is referred to as Cogni- tive Radio. The idea is also known as Dynamic Spectrum Access (DSA) or Open Spectrum Access (OSA). Cognitive Radio is seen as the ¯nal point of software defined radio (SDR) platform evolution. A fully °exible and e±cient software defined radio platform will be the enabling technology for Cognitive Radio. Cognitive Radio imposes a number of requirements on the processing platform such as °exibility, energy e±ciency and guaranteed throughput/latency. The trend in the implementation of SDR is moving towards Multiprocessor System-on-Chip (MPSoC) platforms. The work of this PhD thesis is part of the Ad-hoc Adaptive Freeband (AAF) project. The aim of the AAF project is to design a Cognitive Radio based wireless ad-hoc network for emergency situations. Although the AAF project addresses Cognitive Radio in a holistic fashion from physical layer to networking issues, the work of this thesis mainly focuses on the design of the adaptive physical layer (baseband processing). The physical layer consid- ered in this thesis mainly consists of two parts: transmission and spectrum sensing. A reconfigurable MPSoC platform is used to support the adap- tive baseband processing of Cognitive Radio. A coarse-grain recon¯gurable processor called the Montium, developed at the University of Twente, is considered in this thesis as a key element of the proposed MPSoC platform.

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