Abstract
The novel characteristics of CNTFET have eliminated many technological and fundamental hindrances being faced by CMOS transistors. CNTFET is emerging as prospective replacement for CMOS transistors in digital circuits and systems. This chapter introduces design of CNTFET-based basic logic gates. The basic logic gates analyzed are inverter, NAND, and NOR gates. The designed gates are evaluated in terms of delay, power consumption, and figure-of-merit power-delay-product (PDP). The standard H-SPICE CNTFET model of Stanford University has been used for all simulations. The impact of dielectric material variations on performance parameters of carbon nanotube field effect transistor based universal gates has been analyzed. Comparison between CMOS and CNTFET-based logic circuits is carried out for different dielectric material at 16 nm technology node.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
