Abstract
Many physical implementations of quantum computers impose stringent memory constraints in which 2-qubit operations can only be performed between qubits which are nearest neighbours in a lattice or graph structure. Hence, before a computation can be run on such a device, it must be mapped onto the physical architecture. That is, logical qubits must be assigned physical locations in the quantum memory, and the circuit must be replaced by an equivalent one containing only operations between nearest neighbours. In this paper, we give a new technique for quantum circuit mapping (a.k.a. routing), based on Gaussian elimination constrained to certain optimal spanning trees called Steiner trees. We give a reference implementation of the technique for CNOT circuits and show that it significantly out-performs general-purpose routines on CNOT circuits. We then comment on how the technique can be extended straightforwardly to the synthesis of CNOT+Rz circuits and as a modification to a recently-proposed circuit simplification/extraction procedure for generic circuits based on the ZX-calculus.
Highlights
Quantum circuits give a de facto standard for representing quantum computations at a low level
Noisy intermediate-scale quantum (NISQ) computers with 10-80 qubits are becoming a reality. Popular physical realisations such as superconducting quantum circuits [1, 2, 3] and ion traps [4, 5, 6, 7] consist of qubits stored in the physical states of systems arranged in space, where twoqubit operations are typically only possible between pairs of adjacent systems. When it comes to running a quantum computation on these architectures, logical qubits must be mapped to physical memory locations, and the circuit must be modified to only consist of 2-qubit operations between adjacent qubits in the physical architecture
We present a new approach to quantum circuit mapping based on constrained Gaussian elimination, and apply it in the simplest case of mapping CNOT circuits
Summary
Quantum circuits give a de facto standard for representing quantum computations at a low level. Noisy intermediate-scale quantum (NISQ) computers with 10-80 qubits are becoming a reality Popular physical realisations such as superconducting quantum circuits [1, 2, 3] and ion traps [4, 5, 6, 7] consist of qubits stored in the physical states of systems arranged in space, where twoqubit operations are typically only possible between pairs of adjacent systems. When it comes to running a quantum computation on these architectures, logical qubits must be mapped to physical memory locations, and the circuit must be modified to only consist of 2-qubit operations between adjacent qubits in the physical architecture. Most approaches only take the topological structure of the circuit into account (i.e. which qubits are being acted upon) rather than semantic structure (i.e. the unitary being implemented), and miss out on opportunities for more efficient circuit mapping
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