Abstract
This work is part of a project to design a petaflops-scale computer using a Hybrid Technology Multi-Threaded (HTMT) architecture. In the core of the superconductor part of the HTMT system there should be a high-bandwidth low-latency RSFQ switching cryonetwork (CNET) connecting 4.096 computing modules with each other and with room-temperature semiconductor components. In this report, we present a preliminary study of three simplified, "flat" models of the CNET, each for two alternative architectures: banyan network and pruned high-dimensional mesh. The results indicate that with the speed and space limitations accepted in the HTMT concept, CNET will be able to provide a cross-sectional bandwidth of about 2/3 packets per computing module per network clock cycle (in the present design, 32 ps).
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