CMOS up-conversion mixer with adaptive bias circuit for UHF RFID reader

Abstract

The paper proposes a new CMOS passive up-conversion mixer with an adaptive bias circuit providing a building block for the transmitter (TX) in UHF RFID reader devices implemented in system-on-chip (SoC) technologies. A high linearity of the passive mixer can be maintained over a wide range of DC levels at the DC-coupled IF signal, using the proposed adaptive bias circuit. The input DC voltage, sensed by the adaptive bias circuit, is shifted to an appropriate level, and supplied to the gates of the switching transistors so that the proper bias level of the switching transistor can be maintained. A CMOS passive mixer with the adaptive bias circuit has been designed and implemented using 0.18 ¿m CMOS technology and experimental results have shown that a conversion gain of -3.7 dB, an input 1 dB compression point (IP1dB) of 9 dBm, a high input intercept point (IIP3) of 19 dBm, and a double sideband noise figure (DSB NF) of 4 dB can be achieved. The measured IIP3 can be maintained over a wide range of input DC voltages.