Abstract

Complementary metal-oxide-semiconductor (CMOS) technology has been combined with thin silicon on sapphire films (SOS) for the fabrication of shift registers designed for full TTL compatibility d.c. storage capability, 20 MHz operating frequency, single phase clock and data inputs, and double rail data outputs. Typical power dissipation levels were on the order of 500 nW per stage during standby and 250 /spl mu/W per stage when operating at 20 MHz.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.