Abstract
This brief presents the CMOS fractional-N frequency synthesizer for UHF RFID reader applications. With stringent phase noise (PN) specifications for UHF RFID transceiver, our proposed synthesizer is designed to have a narrow loop bandwidth and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$2^{nd}$ </tex-math></inline-formula> -order loop filter as the optimum solution paired with low noise VCO. Then, we propose the transformer-based impulse sensitivity function (ISF) manipulating VCO that supports the target PN of the frequency synthesizer, albeit with large pass-band characteristic. Compared to conventional ISF manipulating VCO, our proposed solution improves the PN by 11.3 and 14.7 dB at 10 kHz and 1 MHz offset frequencies, respectively. Figure of merit (FOM) is also superior to conventional one by 7.4 and 10.9 dB at aforementioned offset frequencies. The frequency synthesizer is implemented in a 55nm CMOS technology as a part of the UHF RFID transmitter and consumes 38.4 mW power with 0.413 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$mm^{2}$ </tex-math></inline-formula> active area. With comparison to the state-of-the-art frequency synthesizer at sub-6GHz operating frequency, only our solution satisfies the target PN for EPC global standard and various local regulations across the entire UHF RFID operating frequency range.
Published Version
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