CMOS charge-transfer preamplifier for offset-fluctuation cancellation in low-power A/D converters

Abstract

We have developed a low-power, high-accuracy comparator composed of a dynamic latch and a CMOS charge transfer preamplifier (CT preamplifier). The CT preamplifier amplifies the input signal with no static power dissipation, and the operation is almost insensitive to the device parameter fluctuations. The low-power and high-accuracy comparator has been realized by combining the CT preamplifier with a dynamic latch circuit. The fluctuation in the offset voltage of a dynamic latch is reduced by a factor of the preamplifier gain. A 4-bit flash A/D converter circuit has been designed and fabricated by 0.6-/spl mu/m CMOS process. Low differential nonlinearity of less than /spl plusmn/4 mV has been verified by the measurements on test circuits, showing 8-bit resolution capability. Very low power operation at 4.3 /spl mu/W per MS/s per comparator has also been achieved.