Abstract
Wafer level MEMS vacuum packaging has been newly designed, fabricated, and characterized by utilizing silicon bulk micromachining and closed loop solder-line bonding. For evaluating the proposed MEMS packaging, a packaging specimen is fabricated which comprises of cap and device substrates. AuSn closed loop solder lines are formed on the cap substrate and feedthroughs are fabricated on the device substrate with deflection diaphragms, respectively. The proposed package can be utilized in wafer level packaging, chip scale packaging, and low cost packaging due to the low process temperature, the compatible fabrication sequences with MEMS devices and a specified pressure endurance. It can be also applied in packaging integrated micro-systems comprised of various components, sensors, and actuators with different processing/working temperature by utilizing the closed loop solder-line on the heated substrate.
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