Abstract
In this paper, an equation of circuit efficiency (CE) of a power amplifier (PA) circuit is proposed and verified first time. To perform this work, a class F PA is considered, a simple Pi-output matching network (OMN) is proposed for low network loss. It is the first time where the equation of drain efficiency(DE) is investigated in a realistic situation by considering the parasitic effects of the transistor. A high voltage GaN HEMT CGH40010F device is adopted in design and simulation. The 0.9 GHz is selected as the operating frequency of the power amplifier (PA) circuit just for validation and comparison purposes. The proposed OMN gives only 3% power loss due to its simple structure. The proposed realistic drain efficiency (RDE) is well matched with the simulated drain efficiency (DE) result. The theoretical circuit efficiency (CE) of 74.7% is well matched with the simulated value of 73.1% at 0.9 GHz. The circuit efficiency (CE) and output power (Pout) of the proposed PA circuit are 54%-78.5% and 39-41.2 dBm across 0.22–1.18 GHz.
Published Version
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