Chlorine-enhanced thermal oxides growth and significant trap density reduction at SiO2/SiC interface by incorporation of phosphorus

Abstract

In this article an additional annealing step was used to increase the quality of gate dielectric layers on silicon carbide obtained by thermal oxidation. The mixture of POCl3, N2 and O2 gases was used within temperature range of 950°C–1100°C. Abnormal oxide growth rate was observed during the annealing process. Significant improvement of trap density was achieved however the best results were obtained for lower range of annealing temperatures (950°C–1000°C).