Abstract
As the increase of device complexity, prediction of chip performance such as chip speed is crucial as much as yield prediction model in semiconductor manufacturing. In this paper, hybrid of circuit simulation and DOE (design of experiment) are applied to develop speed prediction models for high-speed microprocessor manufacturing process. Speed prediction models are developed through three steps; transistor ratio variation analysis step, electrical test data analysis step, and fabrication test data analysis step. Artificial neural networks are used to find relation between measured data and chip speed and network inputs are selected based on statistical analysis. Electrical test based modeling results showed only 1.2% of RMS error and fabrication level speed prediction model showed 83% of fitness results.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
