Abstract

This paper presents embedded system design of the In-Vehicle System (IVS) for the European Union (EU) emergency call (eCall) system. The IVS transmitter modules are designed, developed and implemented on a field programmable gate array (FPGA) device. The modules are simulated, synthesized, and optimized to be loaded on a reconfigurable device as a system-on-chip (SoC) for the IVS electronic device. All the modules of the transmitter are designed as a single embedded module. The bench-top test is completed for testing and verification of the developed modules. The hardware architecture and interfaces are discussed. The IVS signal processing time is analyzed for multiple frequencies. A range of appropriate frequency and two hardware interfaces are proposed. A state-of-the-art FPGA design is employed as a first implementation approach for the IVS prototyping platform. This work is used as an initial step to implement all the modules of the IVS on a single SoC chip.

Highlights

  • The traffic accidents are leading causes of human fatalities around the world

  • This paper presents embedded system design of the In-Vehicle System (IVS) for the European Union (EU) emergency call system

  • The modulator starts the modulation with the synchronization signal and generates the output signal according to the 3GPP standard for the EU emergency call (eCall) system

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Summary

Introduction

The traffic accidents are leading causes of human fatalities around the world. In 2014, the European Commission (EC) revealed that 25,900 people died in car accidents [1]. The eCall system is designed to reduce the arrival time of emergency aid to road accidents [6]. The IVS initiate a data link between the vehicle and the PSAP. The IVS employs multiple sophisticated modules to process the MSD data. The IVS transmitter uses a cyclic redundancy check (CRC) algorithm and a scrambler system It encodes MSD data by a Turbo encoder module. The IVS transmitter needs the interface solutions to read the MSD data from the vehicle and to transmit the modulated signal via the GSM module. This work presents design and development of the IVS transmitter on a single FPGA chip. It shows the hardware implementation of the IVS transmitter.

The IVS Transmitter Architecture
The IVS CRC and Scrambler
The Employed HARQ
The Modulated Signal
The Modulation and Multiplexing
FPGA Design and Implementation
Simulation
Hardware Implementation
Verification and Test Results
C Code Module
The Interface Solutions
Findings
Conclusions
Full Text
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