Charge-sharing symmetric adiabatic logic in countermeasure against power analysis attacks at cell level

Abstract

Side-channel attacks by cryptanalysis are becoming a serious threat for cryptographers, who are designing systems that are more robust in terms of hardware and algorithm threats, aiming to thwart violations of the secrecy of securely processed information. As our contribution on a related issue, we propose a new secure logic, called charge-sharing symmetric adiabatic logic (CSSAL), for resistance against differential power analysis (DPA) attacks. We verify the security of the proposed CSSAL by carefully analyzing the individual logic functions corresponding to 16 possible dual-input transitions. Then, we compare the results with those of previous secure logic styles using the same parameters and under the same conditions. The figure of merit to measure the resistance of the logic against DPA attacks has been calculated from the variation in power consumption per input transition. The SPICE simulation results show that our proposed logic balances the peak current traces for all input logic transitions, consuming power uniformly over every cycle, and thus making the input–output data resilient to a DPA attack. Moreover, the ability of the proposed CSSAL in a bit-parallel cellular multiplier over GF(2m) shows its significant power reduction compared to conventional secure logic styles and its efficient resistance to DPA attacks.