Charge trapping and reliability characteristics of ultra-thin HfYO x films on n-GaAs substrates

Abstract

Ultra-thin layers of the HfYO x gate dielectric were deposited on n-GaAs substrates by employing radio frequency (rf) sputter deposition system with a Si interface control layer sandwiched between the dielectric and semiconductor. The trapping/detrapping behaviour of charge carriers in the ultra-thin HfYO x /Si gate dielectric stack has been extensively studied during constant-voltage stressing (CVS) and compared with the results obtained from directly deposited HfYO x films on n-GaAs. The increase in gate leakage current observed during electrical stress is estimated and explained by taking into account the build up of trap charges and stress induced trap generation. Also, the capture cross-section of the generated traps is estimated. The variation of the trap centroid and the trapped charge density with injected influences have been investigated using constant current stressing (CCS) measurements. The dielectric breakdown and reliability of the dielectric films have been studied using constant-voltage stressing. A high time-dependent dielectric breakdown (TDDB, t bd ⩾ 1700 s) is observed for HfYO x gate dielectric with a silicon inter-layer under a high constant-voltage stress (8 V).