Charge build-up in Si-processing plasma caused by electron shading effect

Abstract

We investigated the influence of electron temperature and rf bias on charge build-up caused by electron shading in inductively-coupled plasmas (ICP) at 2 to 40 mTorr in Ar. We used Si substrates covered with a 500-nm-thick SiO2 film which had a line-and-space pattern. We measured the electron and ion currents going into the Si substrate through the dielectric structure. When the pattern size decreases, the electron current through the dielectric structure is suppressed and the floating potential increases. We also measured the change in the floating potential of the sample as the electron temperature was increased. As the electron temperature is increased from 2 eV to 4 eV by controlling the gas pressures, the floating potential difference increases between samples with different pattern sizes. To investigate the influence of rf bias (13.56 MHz) on charge build-up, we measured differences in the dc self-bias voltage between samples with different pattern sizes. dc self-bias voltage differences increase with increasing rf bias voltage. This cannot be explained by the slight increase (3 eV to 5.5 eV) in the electron temperature near the rf electrode due to sheath oscillation heating. Therefore, the dc self-bias voltage difference is mainly caused by a decrease in the ion flux impinging on the sidewall of the trench because of the increase in the ion energy.