Abstract
A United Kingdom consortium (MI3) is founded to develop advanced CMOS image sensors for scientific applications. “Vanilla,” a 520×520 array of active pixels with 25-µm pitch is fabricated in the 0.35-µm 4M2P (4 metal, 2 poly) CMOS process and uses a 3.3-V supply. It has flushed reset circuitry to attain low reset noise and random pixel access for high-speed region-of-interest (ROI) readout. “OPIC” is a 64×72 test structure array of digital pixels with 30-µm pitch, fabricated in 0.25-µm 5M1P (5 metal 1 poly) CMOS process with a 3.3/2.5-V supply. It can perform thresholding via an in-pixel comparator for sparse readout at a high frame rate. Characterization of both sensors is performed under optical illumination and x-ray exposure. For x-ray characterization, both sensors were coupled to a structured thallium-doped cesium iodide (CsI:Tl) scintillator via a fiber optic plate. Vanilla has been found to exhibit 34±3e− read noise and a spectral response of 225±5 mA/W at 500 nm and can read a 6×6 ROI at 24,395 frames/s. OPIC has 46±3e− read noise and can perform sparse readout at up to 3700 frames/s. Based on these results, Vanilla could be employed for applications where only a small portion of the image contains relevant information, while OPIC is suited to high-speed imaging applications.
Published Version
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