Characterization of vertical Si nanowire p-n diodes fabricated by metal-assisted etching and AAO templates

Abstract

Vertical Si nanowire p-n diodes were fabricated utilizing both anodic aluminum oxide (AAO) templates and metal-assisted etching. AAO templates with different diameters were fabricated on a p(2.5 μm)-n junction substrate using a two-step anodization and pore widening process. The average diameters of the AAO templates were 36.3, 57.4, and 78.1 nm. Vertical Si nanowire p-n diodes were then fabricated by metal-assisted etching, with average diameters of 37.4, 53.3, and 62.8 nm. The lengths of the vertical Si nanowires were controlled by varying the etching times. For the fully etched (3 μm) Si nanowire, the p-n diodes with smaller diameters yielded higher current densities than those with larger diameters, due to mobility enhancement. However, such dependency was not observed for the partially etched (500 nm) Si nanowire p-n diodes. It was concluded that the recombination current is too dominant in the depletion region to improve mobility in one-dimensional transport.