Abstract

Three-dimensional (3D) complementary metal–oxide–semiconductor (CMOS) integration could enable device scaling beyond the limits of conventional 2D CMOS technology. Such integration requires vertical electrical connections that pass through silicon substrates and interconnect stacked chips. The fabrication of these through-silicon vias (TSVs) creates new challenges in metrology, including the characterization of the thin isolation film deposited on the sidewalls of the TSVs and thickness characterization for wafer thinning. Here, we show that laser-induced terahertz emission microscopy can be used to characterize TSVs. Terahertz emission is observed through the excitation of a transient electric dipole in the depletion field of the TSV using femtosecond laser pulses. The detected terahertz waveform provides information about the local depletion field and thus structural information about the isolation film. By performing a time-of-flight measurement of the terahertz pulse, we can also extract the silicon wafer thickness. Laser-induced terahertz emission, and time-of-flight measurements of the terahertz pulse, can be used to non-invasively characterize through-silicon vias, which are required for three-dimensional CMOS integration.

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