Characterization of sidewall defects in selective epitaxial growth of silicon

Abstract

The sidewall defects in high quality selective epitaxial growth (SEG) of silicon were characterized. Three different SEG diode structures were fabricated and the bulk and perimeter defects were characterized through electrical measurements and transmission electron microscopy (TEM). The structures investigated were SEG grown in a 1.2 μm thick wet-etched field oxide, SEG grown in 1.2 μm thick reactive-ion etched field oxide, and SEG grown in a 1.2 μm high and 0.3 μm wide sidewall oxide cavity. The thin sidewall oxide cavity SEG diode showed the best ideality factors and minimum saturation current densities for diodes intersecting the sidewall, indicating the least thermal stress generated at the SEG/oxide sidewall interface during the cool-down period. Cross-sectional TEM micrographs showed no defects in the bulk SEG or at the sidewall, indicating that the thermal stress in all the processes was not high enough to cause plastic deformation, dislocations, or stacking faults.