Characterization of High Mobility Channels for Use in Quantum Computing Devices

Abstract

Quantum computing promises computation that is fundamentally beyond the reach of classical computers. For the realization of a full-scale quantum computer, millions of quantum bits need to be fabricated on an integrated circuit and operated at cryogenic temperatures. Silicon and silicon-germanium based electron spin quantum bits have the advantage of leveraging decades of semiconductor industry knowledge for high volume manufacturability. During the process development of any semiconductor device, material characterization is essential to understand and improve the process. Transmission electron microscopy is the only technique that could offer localized high spatial resolution characterization. In this work we have introduced two material systems used for electron-spin based semiconductor qubits: silicon metal oxide semiconductors (SiMOS) and silicon germanium based heterostructures. We have then used high resolution TEM to characterize interfaces of Si/SiO2 and Si/SiGe for roughness, chemical impurities, and defects. The novel TEM technique of nano-beam precession electron diffraction is used to characterize the two material systems for intrinsic strain as well as strain induced by proximity to metal gate. Sample preparation for strain analysis is challenging due to the effects of ion implantation, surface amorphization and mechanical bending. We offer solutions to minimize or mitigate these effects and characterize each of these factors in prepared specimen. For sample preparation of bi-axially materials such as Si quantum well films fabricated for buried channel devices there is an added complexity that the strain in these structures is relaxed once they are cut into thin lamellae for TEM analysis. We carefully produce a specimen with varying thickness and measured the strain relaxation due to the creation of free surfaces. Results showed with reduced thickness strain, remains unchanged in [110] direction but fully relaxes in [001] direction. Simulations confirm the results in [110] direction but do not show the same extent of relaxation in [001] direction. Strain analysis of surface metal gates directly in contact with Si showed localized strain pockets at the corner of metal gates, this is in accordance with simulations in literature and explains presence of reported spurious quantum dots. The same analysis on a silicon MOS structure showed the oxide layer dampening the induced strain. Fully integrated fin-based nested metal gates fabricated at Intel were analyzed for strain and the results showed reduced strain under plunger and barrier gates but a larger strain field stretching between the accumulation gates. This showed a more uniform strain landscape at the interface of Si