Abstract
The ability to easily form an SiO{sub 2} dielectric layer is an important aspect of the dominance of silicon in microelectronics. An SiO{sub 2} layer is also easily formed by oxidation of SiC in oxygen or steam. SiC devices have the potential for faster switching speeds, higher voltages, smaller size, lower power losses, higher temperatures and less cooling. However, interface-state densities D{sub it} (cm{sup -2}eV{sup -1}) are high (10{sup 11} to 10{sup 13} for SiC/SiO{sub 2}; c.f. {approx} 5 x 10{sup 9} for Si/SiO{sub 2}) and channel mobilities are low. A contributing reason for the inferior properties of the SiC/SiO{sub 2} interface is believed to be the presence of carbon as a byproduct of the oxidation process. A number of post-oxidation annealing procedures have been used to improve the quality of the interface. A re-oxidation step at 950 C has commonly been employed to reduce D{sub it}, with the mechanism believed to be associated with removal of C trapped at the interface during the oxidation process.
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