Characterization and reliability of low dielectric constant fluorosilicate glass and silicon rich oxide process for deep sub-micron device application

Abstract

Fluorosilicate Glass (FSG) with low dielectric constant currently has been replaced as an alternative to SiO 2 for device speed improvement. However, several integration aspects, such as Fluorine (F) distribution, F thermal stability, gap fill capability, capacitance reduction and via resistance of FSG prepared by the high density plasma (HDP) chemical vapor deposition (CVD) method are of concern for sub-0.18-μm devices. In this study, HDP–FSG films show different F concentrations at different locations on an 8-inch wafer. In addition, the FSG film shows poor thermal stability and F diffuses out of the film after high temperature annealing and the pressure cook test (PCT). However, the thermal stability of FSG film can be improved by capping with an oxide layer. The results indicate that silicon rich oxide (SRO) has a better effect at blocking the F diffusion out of FSG films at high temperature than plasma enhanced oxide (PE-OX). For the gap fill capability, HDP-FSG can fill all 0.23-μm gaps and some of the 0.21-μm gaps with an aspect ratio <3.8 but not the 0.19-μm gaps. A 8000 Å HDP–FSG film with 600 Å USG liner and 2000 Å cap layer shows approximately 7.5 to 7.7% capacitance reduction on 0.23/0.23-μm gaps when compared with USG (undoped silicate glass). In addition, FSG has a larger capacitance reduction on the wider metal lines than the thinner metal lines at the same gap size due to a capacitance fringe effect. The via resistance for 0.26 μm unlanded via (which allow minor photo mis-alignment) of HDP-FSG film is also similar to that of USG.