Characterization and Reduction of Defects in 4H-SiC Substrate and Homo-Epitaxial Wafer

Abstract

4H-SiC substrates and homo-epitaxial layers were obtained using the traditional methods of physical vapor transport and chemical vapor deposition. Defect morphology has been studied using both Synchrotron White Beam X-ray Topography and Monochromatic Beam X-ray Topography. Molten KOH etching method was adopted to further investigate the dislocation behavior mechanisms. Deflected dislocations were observed at the periphery regions in both substrate and epitaxial wafers. 3C polytypes and half loop arrays were observed in the 4H-SiC epitaxial wafer. It is also found that the majority of basal plane dislocations are converted to threading edge dislocations in the epitaxial wafer samples. The proportion of BPD to TED conversion depends on the surface step morphology and growth mode in epitaxial growth which in turn depends on the C/Si ratio. By the optimization of etching time prior to epitaxy and C/Si ratio, high-quality epitaxial wafers with extremely low basal plane dislocations densities (＜0.1 cm-2) was obtained.