Characterization and Control of Carbon Nanotube Doping

Abstract

Carbon nanotube FETs show great promise for beyond-Si and monolithic 3D electronics, however there are still fundamental questions to explore. In particular, controlled N- and P- doping is a fundamental process module which can be used to engineer semiconductor resistance in un-gated regions such as the contact or extension, as well as optimize band-to-band tunneling leakage [1-4]. To-date both N- and P- doping has been demonstrated for CNT, but the optimal strategies for doping control and carrier density quantification have not been determined. In this work, we present a study of N- and P- doping using solid-state dopants and doping control strategy using a dielectric barrier of tunable thickness. A TCAD evaluation reveals the tradeoffs between carrier density and mobility for increasing dielectric barrier thickness, and reveals the critical role of dielectric constant in optimizing performance of spacer doping [5]. Multiple characterization approaches under evaluation help to correlate doping strength to experimentally measurable quantities with insight into the doping mechanisms. Finally, we will summarize potential approaches for improving doping control and quantification, and progress towards integration of the doping in highly-scaled high-performance carbon nanotube FETs [6].[1] Z. Zhang, et al., “Complementary carbon nanotube metal-oxide-semiconductor field-effect transistors with localized solid-state extension doping,” Nature Electronics, 2023.[2] Q. Lin, et al., “Band-to-band Tunneling Leakage Current Characterization and Projection in Carbon Nanotube Transistors,” ACS Nano, 2023.[3] G. Zeevi, et al., “PN Junction and band to band tunneling in carbon nanotube transistors at room temperature,” Nanotechnology, 2021.[4] L. Liyanage, et al., “VLSI-compatible carbon nanotube doping technique with low work-function metal oxides,” Nano Letters, 2014.[5] C. Gilardi et al., “Barrier Booster for Remote Extension Doping and its DTCO for 1D & 2D FETs”, IEDM 2023[6] S.Li, et al., “High-performance and low parasitic capacitance CNT MOSFET: 1.2 mA/μm at VDS of 0.75 V by self-aligned doping in sub-20 nm spacer,” IEDM 2023.