Abstract
This chapter discusses the concept of optical packet switching. Optical packet switching offers the potential to achieve high capacities for packet-switched networks. In an optical packet switching node, buffers are usually implemented with optical fiber delay lines because optical random access memory is not feasible. Thus, a switch architecture that requires complicated buffer management, such as a central-buffered switching element, is not suitable for optical packet switching. An input-buffered optical packet switch consists of optical packet buffers and an optical space division switch whereas an output-buffered optical packet switch consists of a broadcast bus, packet buffers, and a wavelength channel selector. A full construction of an optical packet-switched node consists of four subblocks. An input interface consists of a header extractor, which extracts header information from incoming packets, and a synchronizer, which aligns the incoming packets in real time against a clock. A switching core transmits the packets to their proper outputs. An output interface inserts a new header and may have to regenerate the data and convert its wavelength. A controller executes contention resolution and buffer management. Optical buffer memory is another key subsystem in both input-buffered and output-buffered optical packet switches.
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