Abstract
This chapter provides a detailed introduction to the Cortex-M processor. This includes the CPU programmers model, the processor memory map and busses, power management, and fault conditions. We also examine the system control block registers used to configure operation of the Cortex-M processor. Once the basic Cortex processor architecture is understood, we take a detailed look at Cortex-M exception and interrupt handling. Alongside the processor architectural features, we also review the Cortex-M “Thumb-2” instruction set and its “bit banding” feature used for bit manipulation. Once we have a good understanding of the Cortex-M3, we look at the additional features provided by the Cortex-M4 and the limitations of the Cortex-M0 and Cortex-M0+. Each section has practical exercises in the C language that illustrate the features described in the text.
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