Abstract

This chapter outlines the history of the evolution of the ARM architecture and provides an overview of the ARM7TDMI processor architecture. It describes the basic instruction set architecture of the ARM7 processors. The ARM instruction set is a thoroughly modern, 32-bit reduced instruction set computer (RISC) instruction set. All instructions are the same length and, with few exceptions, execute in one clock cycle. The register set is almost completely general-purpose. All data processing instructions take place between registers and all memory operations are restricted to memory-to-register load operations and register-to-memory store operations. Additional effective addressing modes enhance this model by adding incrementing, decrementing, index register, immediate offset values, and scaled register modes. The chapter examines the differences and similarities between the ARM architecture and the 68K architecture. It provides an introduction to the ARM instruction set and addressing modes. It explains how to write simple code snippets in ARM assembly language using all addressing modes and instructions of the architecture.

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